diff -Nrup linux-2.6.28/arch/arm/mach-pxa/include/mach/mfp-pxa320.h linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/mfp-pxa320.h --- linux-2.6.28/arch/arm/mach-pxa/include/mach/mfp-pxa320.h 2008-12-25 00:26:37.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/mfp-pxa320.h 2009-01-05 10:18:30.000000000 +0100 @@ -38,6 +38,7 @@ #define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0) /* Chip Select */ +#define GPIO3_nCS2 MFP_CFG(GPIO3, AF1) #define GPIO4_nCS3 MFP_CFG(GPIO4, AF1) /* AC97 */ @@ -283,6 +284,9 @@ #define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT) #define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT) #define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT) +#define GPIO75_UART1_RXD MFP_CFG_LPM(GPIO75, AF1, FLOAT) +#define GPIO76_UART1_RXD MFP_CFG_LPM(GPIO76, AF3, FLOAT) +#define GPIO76_UART1_TXD MFP_CFG_LPM(GPIO76, AF1, FLOAT) #define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT) #define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT) #define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT) @@ -291,6 +295,9 @@ #define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT) #define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT) #define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT) +#define GPIO77_UART1_CTS MFP_CFG_LPM(GPIO77, AF1, FLOAT) +#define GPIO82_UART1_RTS MFP_CFG_LPM(GPIO82, AF1, FLOAT) +#define GPIO82_UART1_CTS MFP_CFG_LPM(GPIO82, AF3, FLOAT) #define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT) #define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT) #define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT) @@ -299,13 +306,18 @@ #define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT) #define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT) #define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT) +#define GPIO79_UART1_DSR MFP_CFG_LPM(GPIO79, AF1, FLOAT) +#define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF1, FLOAT) +#define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF3, FLOAT) #define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT) #define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT) #define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT) #define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT) #define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT) +#define GPIO78_UART1_DCD MFP_CFG_LPM(GPIO78, AF1, FLOAT) #define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT) #define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT) +#define GPIO80_UART1_RI MFP_CFG_LPM(GPIO80, AF1, FLOAT) #define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT) /* UART2 */ @@ -438,6 +450,9 @@ #define GPIO2_RDY MFP_CFG(GPIO2, AF1) #define GPIO5_NPIOR MFP_CFG(GPIO5, AF3) +#define GPIO6_NPIOW MFP_CFG(GPIO6, AF3) +#define GPIO7_NPIOS16 MFP_CFG(GPIO7, AF3) +#define GPIO8_NPWAIT MFP_CFG(GPIO8, AF3) #define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1) #define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1) diff -Nrup linux-2.6.28/arch/arm/mach-pxa/include/mach/trizeps4.h linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/trizeps4.h --- linux-2.6.28/arch/arm/mach-pxa/include/mach/trizeps4.h 2008-12-25 00:26:37.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/trizeps4.h 2009-01-05 10:18:30.000000000 +0100 @@ -28,16 +28,6 @@ /* Logic on ConXS-board DICR register*/ #define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) -/* virtual memory regions */ -#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ - -#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ -#define TRIZEPS4_CFSR_VIRT 0xF0100000 -#define TRIZEPS4_BOCR_VIRT 0xF0200000 -#define TRIZEPS4_DICR_VIRT 0xF0300000 -#define TRIZEPS4_IRCR_VIRT 0xF0400000 -#define TRIZEPS4_UPSR_VIRT 0xF0500000 - /* size of flash */ #define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ @@ -76,87 +66,4 @@ #define GPIO_PIC 0 #define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) -#ifdef CONFIG_MACH_TRIZEPS_CONXS -/* for CONXS base board define these registers */ -#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) -#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) - -#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) -#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) - -#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) -#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) - -#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) -#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) - -#ifndef __ASSEMBLY__ -static inline unsigned short CFSR_readw(void) -{ - /* [Compact Flash Status Register] is read only */ - return *((unsigned short *)CFSR_P2V(0x0C000000)); -} -static inline void BCR_writew(unsigned short value) -{ - /* [Board Control Regsiter] is write only */ - *((unsigned short *)BCR_P2V(0x0E000000)) = value; -} -static inline void DCR_writew(unsigned short value) -{ - /* [Display Control Register] is write only */ - *((unsigned short *)DCR_P2V(0x0E000000)) = value; -} -static inline void IRCR_writew(unsigned short value) -{ - /* [InfraRed data Control Register] is write only */ - *((unsigned short *)IRCR_P2V(0x0E000000)) = value; -} -#else -#define ConXS_CFSR CFSR_P2V(0x0C000000) -#define ConXS_BCR BCR_P2V(0x0E000000) -#define ConXS_DCR DCR_P2V(0x0F800000) -#define ConXS_IRCR IRCR_P2V(0x0F800000) -#endif -#else -/* for whatever baseboard define function registers */ -static inline unsigned short CFSR_readw(void) -{ - return 0; -} -static inline void BCR_writew(unsigned short value) -{ - ; -} -static inline void DCR_writew(unsigned short value) -{ - ; -} -static inline void IRCR_writew(unsigned short value) -{ - ; -} -#endif /* CONFIG_MACH_TRIZEPS_CONXS */ - -#define ConXS_CFSR_BVD_MASK 0x0003 -#define ConXS_CFSR_BVD1 (1 << 0) -#define ConXS_CFSR_BVD2 (1 << 1) -#define ConXS_CFSR_VS_MASK 0x000C -#define ConXS_CFSR_VS1 (1 << 2) -#define ConXS_CFSR_VS2 (1 << 3) -#define ConXS_CFSR_VS_5V (0x3 << 2) -#define ConXS_CFSR_VS_3V3 0x0 - -#define ConXS_BCR_S0_POW_EN0 (1 << 0) -#define ConXS_BCR_S0_POW_EN1 (1 << 1) -#define ConXS_BCR_L_DISP (1 << 4) -#define ConXS_BCR_CF_BUF_EN (1 << 5) -#define ConXS_BCR_CF_RESET (1 << 7) -#define ConXS_BCR_S0_VCC_3V3 0x1 -#define ConXS_BCR_S0_VCC_5V0 0x2 -#define ConXS_BCR_S0_VPP_12V 0x4 -#define ConXS_BCR_S0_VPP_3V3 0x8 - -#define ConXS_IRCR_MODE (1 << 0) -#define ConXS_IRCR_SD (1 << 1) - #endif /* _TRIPEPS4_H_ */ diff -Nrup linux-2.6.28/arch/arm/mach-pxa/include/mach/trizeps5.h linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/trizeps5.h --- linux-2.6.28/arch/arm/mach-pxa/include/mach/trizeps5.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/trizeps5.h 2009-01-05 13:34:05.000000000 +0100 @@ -0,0 +1,71 @@ +/************************************************************************ + * Include file for TRIZEPS5 SoM and ConXS eval-board + * Copyright (c) Jürgen Schindele + * 2008 + ************************************************************************/ + +/* + * Includes/Defines + */ +#ifndef _TRIPEPS5_H_ +#define _TRIPEPS5_H_ + +/* physical memory regions */ +#define TRIZEPS5_FLASH_PHYS (0x10000000) /* CS2 Flash region */ +#define TRIZEPS5_DISK_PHYS (0x15000000) /* CSX1 Disk On Chip region */ +#define TRIZEPS5_ETH_PHYS (0x17000000) /* CSX2 Ethernet DM9000 reg */ +#define TRIZEPS5_PIC_PHYS (0x14000000) /* CSX3 Logic chip on ConXS */ +#define TRIZEPS5_SDRAM_BASE 0xa0000000 /* SDRAM region */ + + /* Logic on ConXS-board CSFR register*/ +#define TRIZEPS5_CFSR_PHYS (TRIZEPS5_PIC_PHYS) + /* Logic on ConXS-board BOCR register*/ +#define TRIZEPS5_BOCR_PHYS (TRIZEPS5_PIC_PHYS+0x00200000) + /* Logic on ConXS-board IRCR register*/ +#define TRIZEPS5_IRCR_PHYS (TRIZEPS5_PIC_PHYS+0x00300000) + /* Logic on ConXS-board UPSR register*/ +#define TRIZEPS5_UPSR_PHYS (TRIZEPS5_PIC_PHYS+0x00280000) + /* Logic on ConXS-board DICR register*/ +#define TRIZEPS5_DICR_PHYS (TRIZEPS5_PIC_PHYS+0x00380000) + +/* size of flash */ +#define TRIZEPS5_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ + +/* Ethernet Controller Davicom DM9000 */ +#define GPIO_DM9000 105 +#define TRIZEPS5_ETH_IRQ IRQ_GPIO(GPIO_DM9000) + +/* UCB1400 audio / TS-controller */ +#define GPIO_UCB1400 15 +#define TRIZEPS5_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) + +/* PCMCIA socket Compact Flash */ +#define GPIO_PCD 17 /* PCMCIA Card Detect */ +#define TRIZEPS5_CD_IRQ IRQ_GPIO(GPIO_PCD) +#define GPIO_PRDY 16 /* READY / nINT */ +#define TRIZEPS5_READY_NINT IRQ_GPIO(GPIO_PRDY) + +/* MMC socket */ +#define GPIO_MMC1_DET 114 +#define TRIZEPS5_MMC1_IRQ IRQ_GPIO(GPIO_MMC1_DET) +#define GPIO_MMC2_DET 41 +#define TRIZEPS5_MMC2_IRQ IRQ_GPIO(GPIO_MMC2_DET) + +/* DOC NAND chip */ +#define GPIO_DOC_LOCK 94 +#define GPIO_DOC_IRQ 93 +#define TRIZEPS5_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) + +/* SPI interface */ +#define GPIO_SPI 53 +#define TRIZEPS5_SPI_IRQ IRQ_GPIO(GPIO_SPI) + +/* LEDS using tx2 / rx2 */ +#define GPIO_SYS_BUSY_LED 30 +#define GPIO_HEARTBEAT_LED 31 + +/* Off-module PIC on ConXS board */ +#define GPIO_PIC 9 +#define TRIZEPS5_PIC_IRQ IRQ_GPIO(GPIO_PIC) + +#endif /* _TRIPEPS5_H_ */ diff -Nrup linux-2.6.28/arch/arm/mach-pxa/include/mach/trizeps_conxs.h linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/trizeps_conxs.h --- linux-2.6.28/arch/arm/mach-pxa/include/mach/trizeps_conxs.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/include/mach/trizeps_conxs.h 2009-01-05 13:36:25.000000000 +0100 @@ -0,0 +1,77 @@ + +/* index of resource */ +#define CFSR 0 +#define BOCR 1 +#define DICR 2 +#define IRCR 3 +#define UPSR 4 + +#define ConXS_CFSR brd.addr[CFSR].val +#define ConXS_CFSR_BVD_MASK 0x0003 +#define ConXS_CFSR_BVD1 (1 << 0) +#define ConXS_CFSR_BVD2 (1 << 1) +#define ConXS_CFSR_VS_MASK 0x000C +#define ConXS_CFSR_VS1 (1 << 2) +#define ConXS_CFSR_VS2 (1 << 3) +#define ConXS_CFSR_VS_5V (0x3 << 2) +#define ConXS_CFSR_VS_3V3 0x0 + +#define ConXS_BOCR brd.addr[BOCR].val +#define ConXS_BOCR_S0_VCC_3V3 (1 << 0) +#define ConXS_BOCR_S0_VCC_5V0 (1 << 1) +#define ConXS_BOCR_S0_VPP_12V (1 << 2) +#define ConXS_BOCR_S0_VPP_3V3 (1 << 3) +#define ConXS_BOCR_L_DISP (1 << 4) +#define ConXS_BOCR_CF_BUF_EN (1 << 5) +#define ConXS_BOCR_CF_RESET (1 << 7) + +#define ConXS_DICR brd.addr[DICR].val + +#define ConXS_IRCR brd.addr[IRCR].val +#define ConXS_IRCR_MODE (1 << 0) +#define ConXS_IRCR_SD (1 << 1) + + +struct conxs_plat_data { + struct pc_slot { + int gpio_irq; /* Card Interrupt */ + int gpio_pcd; /* Card Detect (insert) */ + } slots[2]; + int num_slots; + int flags; +}; + +#define ConXS_NUM_SLOT(plat) (plat->flags & 0x03) + +#ifdef CONFIG_MACH_TRIZEPS_CONXS +unsigned short CFSR_readw(void); +void board_pcmcia_power(int power); +void board_backlight_power(int on); +#else +/* for whatever baseboard define function registers */ +static inline unsigned short CFSR_readw(void) +{ + return 0; +} +static inline void BCR_writew(unsigned short value) +{ + ; +} +static inline void DCR_writew(unsigned short value) +{ + ; +} +static inline void IRCR_writew(unsigned short value) +{ + ; +} +static inline void board_pcmcia_power(int power) +{ + ; +} +static inline void board_backlight_power(int on) +{ + ; +} +#endif /* CONFIG_MACH_TRIZEPS_CONXS */ + diff -Nrup linux-2.6.28/arch/arm/mach-pxa/Kconfig linux-2.6.28-patch/arch/arm/mach-pxa/Kconfig --- linux-2.6.28/arch/arm/mach-pxa/Kconfig 2008-12-25 00:26:37.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/Kconfig 2009-01-05 10:18:30.000000000 +0100 @@ -212,6 +212,13 @@ config MACH_TRIZEPS4WL select PXA27x select PXA_SSP +config MACH_TRIZEPS5 + bool "Keith und Koep Trizeps5 DIMM-Module" + depends on TRIZEPS_PXA + select TRIZEPS_PCMCIA + select PXA3xx + select CPU_PXA320 + choice prompt "Select base board for Trizeps module" depends on TRIZEPS_PXA diff -Nrup linux-2.6.28/arch/arm/mach-pxa/Makefile linux-2.6.28-patch/arch/arm/mach-pxa/Makefile --- linux-2.6.28/arch/arm/mach-pxa/Makefile 2008-12-25 00:26:37.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/Makefile 2009-01-05 10:18:30.000000000 +0100 @@ -34,6 +34,8 @@ obj-$(CONFIG_MACH_MAINSTONE) += mainston obj-$(CONFIG_MACH_MP900C) += mp900.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o +obj-$(CONFIG_MACH_TRIZEPS5) += trizeps5.o +obj-$(CONFIG_MACH_TRIZEPS_CONXS)+= trizeps_conxs.o obj-$(CONFIG_MACH_COLIBRI) += colibri.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o diff -Nrup linux-2.6.28/arch/arm/mach-pxa/trizeps4.c linux-2.6.28-patch/arch/arm/mach-pxa/trizeps4.c --- linux-2.6.28/arch/arm/mach-pxa/trizeps4.c 2008-12-25 00:26:37.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/trizeps4.c 2009-01-05 13:39:03.000000000 +0100 @@ -45,6 +45,7 @@ #include #include #include +#include #include #include #include @@ -66,14 +67,8 @@ static unsigned long trizeps4_pin_config[] __initdata = { /* Chip Selects */ GPIO15_nCS_1, /* DiskOnChip CS */ - GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */ - GPIO94_GPIO, /* DOC lock */ - GPIO78_nCS_2, /* DM9000 CS */ - GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */ - GPIO79_nCS_3, /* Logic CS */ - GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */ /* LCD - 16bpp Active TFT */ GPIO58_LCD_LDD_0, @@ -148,6 +143,14 @@ static unsigned long trizeps4_pin_config /* I2C */ GPIO117_I2C_SCL, GPIO118_I2C_SDA, + + /* misc */ + GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */ + GPIO1_GPIO, /* TRIZEPS4_UCB1400_IRQ */ + GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */ + GPIO94_GPIO, /* DOC lock */ + GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */ + }; static unsigned long trizeps4wl_pin_config[] __initdata = { @@ -216,13 +219,13 @@ static struct platform_device flash_devi ****************************************************************************/ static struct resource dm9000_resources[] = { [0] = { - .start = TRIZEPS4_ETH_PHYS+0x300, - .end = TRIZEPS4_ETH_PHYS+0x400-1, + .start = TRIZEPS4_ETH_PHYS, + .end = TRIZEPS4_ETH_PHYS+3, .flags = IORESOURCE_MEM, }, [1] = { - .start = TRIZEPS4_ETH_PHYS+0x8300, - .end = TRIZEPS4_ETH_PHYS+0x8400-1, + .start = TRIZEPS4_ETH_PHYS+0x8000, + .end = TRIZEPS4_ETH_PHYS+0x8040-1, .flags = IORESOURCE_MEM, }, [2] = { @@ -279,61 +282,71 @@ static struct platform_device leds_devic }, }; +/**************************************************************************** + * CONXS baseboard + ****************************************************************************/ +static struct resource tri4_conxs_resources[] = { + [CFSR] = { + .start = TRIZEPS4_CFSR_PHYS, + .end = TRIZEPS4_CFSR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [BOCR] = { + .start = TRIZEPS4_BOCR_PHYS, + .end = TRIZEPS4_BOCR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [DICR] = { + .start = TRIZEPS4_DICR_PHYS, + .end = TRIZEPS4_DICR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [IRCR] = { + .start = TRIZEPS4_IRCR_PHYS, + .end = TRIZEPS4_IRCR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [UPSR] = { + .start = TRIZEPS4_UPSR_PHYS, + .end = TRIZEPS4_UPSR_PHYS+7, + .flags = IORESOURCE_MEM, + } +}; + +static struct conxs_plat_data tri4_conxs_platdata = { + .slots = { + [0] = { + .gpio_irq = GPIO_PRDY, + .gpio_pcd = GPIO_PCD, + }, + }, + .num_slots = 1, + .flags = 0, +}; + +static struct platform_device conxs_device = { + .name = "conxs", + .id = -1, + .num_resources = ARRAY_SIZE(tri4_conxs_resources), + .resource = tri4_conxs_resources, + .dev = { + .platform_data = &tri4_conxs_platdata, + } +}; + static struct platform_device *trizeps4_devices[] __initdata = { &flash_device, &dm9000_device, &leds_devices, + &conxs_device, }; static struct platform_device *trizeps4wl_devices[] __initdata = { &flash_device, &leds_devices, + &conxs_device, }; -static short trizeps_conxs_bcr; - -/* PCCARD power switching supports only 3,3V */ -void board_pcmcia_power(int power) -{ - if (power) { - /* switch power on, put in reset and enable buffers */ - trizeps_conxs_bcr |= power; - trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; - trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN; - BCR_writew(trizeps_conxs_bcr); - /* wait a little */ - udelay(2000); - /* take reset away */ - trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET; - BCR_writew(trizeps_conxs_bcr); - udelay(2000); - } else { - /* put in reset */ - trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; - BCR_writew(trizeps_conxs_bcr); - udelay(1000); - /* switch power off */ - trizeps_conxs_bcr &= ~0xf; - BCR_writew(trizeps_conxs_bcr); - } - pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff", - trizeps_conxs_bcr); -} -EXPORT_SYMBOL(board_pcmcia_power); - -/* backlight power switching for LCD panel */ -static void board_backlight_power(int on) -{ - if (on) - trizeps_conxs_bcr |= ConXS_BCR_L_DISP; - else - trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; - - pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", - trizeps_conxs_bcr); - BCR_writew(trizeps_conxs_bcr); -} - /* a I2C based RTC is known on CONXS board */ static struct i2c_board_info trizeps4_i2c_devices[] __initdata = { { I2C_BOARD_INFO("rtc-pcf8593", 0x51) } @@ -399,7 +412,7 @@ static void trizeps4_irda_transceiver_mo /* Switch mode */ if (mode & IR_SIRMODE) trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */ - else if (mode & IR_FIRMODE) + else if (mode & IR_FIRMODE) { trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */ /* Switch power */ @@ -430,39 +443,6 @@ static struct pxaohci_platform_data triz .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, }; -static struct map_desc trizeps4_io_desc[] __initdata = { - { /* ConXS CFSR */ - .virtual = TRIZEPS4_CFSR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS BCR */ - .virtual = TRIZEPS4_BOCR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS IRCR */ - .virtual = TRIZEPS4_IRCR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS DCR */ - .virtual = TRIZEPS4_DICR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - }, - { /* ConXS UPSR */ - .virtual = TRIZEPS4_UPSR_VIRT, - .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS), - .length = 0x00001000, - .type = MT_DEVICE - } -}; - static struct pxafb_mode_info sharp_lcd_mode = { .pixclock = 78000, .xres = 640, @@ -540,19 +520,17 @@ static void __init trizeps4_init(void) #ifdef CONFIG_IDE_PXA_CF /* if boot direct from compact flash dont disable power */ - trizeps_conxs_bcr = 0x0009; + board_pcmcia_power(1); #else /* this is the reset value */ - trizeps_conxs_bcr = 0x00A0; + board_pcmcia_power(0); #endif - BCR_writew(trizeps_conxs_bcr); board_backlight_power(1); } static void __init trizeps4_map_io(void) { pxa_map_io(); - iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc)); if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) { /* if flash is 16 bit wide its a Trizeps4 WL */ diff -Nrup linux-2.6.28/arch/arm/mach-pxa/trizeps5.c linux-2.6.28-patch/arch/arm/mach-pxa/trizeps5.c --- linux-2.6.28/arch/arm/mach-pxa/trizeps5.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/trizeps5.c 2009-01-05 13:44:31.000000000 +0100 @@ -0,0 +1,562 @@ +/* + * linux/arch/arm/mach-pxa/trizeps5.c + * + * Support for the Keith und Koep Trizeps5 Module Platform. + * + * Author: Jürgen Schindele + * Created: 20 09, 2008 + * Copyright: Jürgen Schindele + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "generic.h" +#include "devices.h" + +/* comment out the following line if you want to use the + * Standard UART from PXA for serial / irda transmission + * and acivate it if you have status leds connected */ +#define STATUS_LEDS_ON_STUART_PINS 1 + +/***************************************************************************** + * MultiFunctionPins of CPU + *****************************************************************************/ +static unsigned long trizeps5_pin_config[] __initdata = { + /* Chip Selects */ + GPIO3_nCS2, /* NAND CS */ + GPIO4_nCS3, /* DM9000/CSX[1,3,4] CS */ + + /* LCD - 16bpp Active TFT */ + GPIO6_2_LCD_LDD_0, + GPIO7_2_LCD_LDD_1, + GPIO8_2_LCD_LDD_2, + GPIO9_2_LCD_LDD_3, + GPIO10_2_LCD_LDD_4, + GPIO11_2_LCD_LDD_5, + GPIO12_2_LCD_LDD_6, + GPIO13_2_LCD_LDD_7, + GPIO63_LCD_LDD_8, + GPIO64_LCD_LDD_9, + GPIO65_LCD_LDD_10, + GPIO66_LCD_LDD_11, + GPIO67_LCD_LDD_12, + GPIO68_LCD_LDD_13, + GPIO69_LCD_LDD_14, + GPIO70_LCD_LDD_15, + GPIO14_2_LCD_FCLK, + GPIO15_2_LCD_LCLK, + GPIO16_2_LCD_PCLK, + GPIO17_2_LCD_BIAS, + + /* UART */ + GPIO75_UART1_RXD, + GPIO76_UART1_TXD, + GPIO77_UART1_CTS, + GPIO78_UART1_DCD, + GPIO79_UART1_DSR, + GPIO80_UART1_RI, + GPIO81_UART1_DTR, + GPIO82_UART1_RTS, + + GPIO109_UART2_RTS, + GPIO110_UART2_RXD, + GPIO111_UART2_TXD, + GPIO112_UART2_CTS, + +#ifdef STATUS_LEDS_ON_STUART_PINS + GPIO30_GPIO, + GPIO31_GPIO, +#else + GPIO30_UART3_RXD, + GPIO31_UART3_TXD, +#endif + /* PCMCIA */ + GPIO5_NPIOR, + GPIO6_NPIOW, + GPIO7_NPIOS16, + GPIO8_NPWAIT, + GPIO16_GPIO, /* TRIZEPS5_READY_NINT */ + GPIO17_GPIO, /* TRIZEPS5_CD_IRQ */ +/* GPIO48_nPOE, + GPIO49_nPWE, + GPIO55_nPREG, + GPIO104_PSKTSEL,*/ + + /* MultiMediaCard */ + GPIO18_MMC1_DAT0, /* external */ + GPIO19_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO20_MMC1_DAT2, + GPIO21_MMC1_DAT3, + GPIO22_MMC1_CLK, + GPIO23_MMC1_CMD, + GPIO114_GPIO, /* TRIZEPS5_MMC1_IRQ */ + + GPIO24_MMC2_DAT0, /* internal */ + GPIO25_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO26_MMC2_DAT2, + GPIO27_MMC2_DAT3, + GPIO28_MMC2_CLK, + GPIO29_MMC2_CMD, + GPIO41_GPIO, /* TRIZEPS5_MMC2_IRQ */ + + /* AC97 */ + GPIO35_AC97_SDATA_IN_0, + GPIO36_AC97_SDATA_IN_1, + GPIO37_AC97_SDATA_OUT, + GPIO38_AC97_SYNC, + GPIO39_AC97_BITCLK, + + /* USB OHCI */ + GPIO2_2_USBH_PEN, /* USBHPEN1 */ + GPIO3_2_USBH_PWR, /* USBHPWR1 */ + + /* I2C */ + GPIO32_I2C_SCL, + GPIO33_I2C_SDA, + + /* MISC */ + GPIO9_GPIO, /* TRIZEPS5_PIC_IRQ */ + GPIO15_GPIO, /* TRIZEPS5_UCB1400_IRQ */ + GPIO105_GPIO, /* TRIZEPS5_ETH_IRQ */ +}; + +/**************************************************************************** + * ONBOARD FLASH + ****************************************************************************/ +static struct mtd_partition trizeps5_partitions[] = { + { + .name = "Bootloader", + .offset = 0x00000000, + .size = 0x00040000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, { + .name = "Backup", + .offset = 0x00040000, + .size = 0x00040000, + }, { + .name = "Image", + .offset = 0x00080000, + .size = 0x01080000, + }, { + .name = "IPSM", + .offset = 0x01100000, + .size = 0x00e00000, + }, { + .name = "Registry", + .offset = 0x01f00000, + .size = MTDPART_SIZ_FULL, + } +}; + +static struct physmap_flash_data trizeps5_flash_data[] = { + { + .width = 2, /* bankwidth in bytes */ + .parts = trizeps5_partitions, + .nr_parts = ARRAY_SIZE(trizeps5_partitions) + } +}; + +static struct resource flash_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + SZ_32M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = trizeps5_flash_data, + }, + .resource = &flash_resource, + .num_resources = 1, +}; + +/**************************************************************************** + * DAVICOM DM9000 Ethernet + ****************************************************************************/ +static struct resource dm9000_resources[] = { + [0] = { + .start = TRIZEPS5_ETH_PHYS, + .end = TRIZEPS5_ETH_PHYS+2, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = TRIZEPS5_ETH_PHYS+0x10000, + .end = TRIZEPS5_ETH_PHYS+0x1007f, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = TRIZEPS5_ETH_IRQ, + .end = TRIZEPS5_ETH_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + }, +}; + +static struct dm9000_plat_data tri_dm9000_platdata = { + .flags = DM9000_PLATF_16BITONLY, +}; + +static struct platform_device dm9000_device = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(dm9000_resources), + .resource = dm9000_resources, + .dev = { + .platform_data = &tri_dm9000_platdata, + } +}; + +/**************************************************************************** + * LED's on GPIO pins of PXA + ****************************************************************************/ +static struct gpio_led trizeps5_led[] = { +#ifdef STATUS_LEDS_ON_STUART_PINS + { + .name = "led0:orange:heartbeat", /* */ + .default_trigger = "heartbeat", + .gpio = GPIO_HEARTBEAT_LED, + .active_low = 1, + }, + { + .name = "led1:yellow:cpubusy", /* */ + .default_trigger = "cpu-busy", + .gpio = GPIO_SYS_BUSY_LED, + .active_low = 1, + }, +#endif +}; + +static struct gpio_led_platform_data trizeps5_led_data = { + .leds = trizeps5_led, + .num_leds = ARRAY_SIZE(trizeps5_led), +}; + +static struct platform_device leds_devices = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &trizeps5_led_data, + }, +}; + +/**************************************************************************** + * CONXS baseboard + ****************************************************************************/ +static struct resource tri5_conxs_resources[] = { + [CFSR] = { + .start = TRIZEPS5_CFSR_PHYS, + .end = TRIZEPS5_CFSR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [BOCR] = { + .start = TRIZEPS5_BOCR_PHYS, + .end = TRIZEPS5_BOCR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [DICR] = { + .start = TRIZEPS5_DICR_PHYS, + .end = TRIZEPS5_DICR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [IRCR] = { + .start = TRIZEPS5_IRCR_PHYS, + .end = TRIZEPS5_IRCR_PHYS+7, + .flags = IORESOURCE_MEM, + }, + [UPSR] = { + .start = TRIZEPS5_UPSR_PHYS, + .end = TRIZEPS5_UPSR_PHYS+7, + .flags = IORESOURCE_MEM, + }, +}; + +static struct conxs_plat_data tri5_conxs_platdata = { + .slots = { + [0] = { + .gpio_irq = GPIO_PRDY, /* correct */ + .gpio_pcd = GPIO_PCD, /* correct */ + }, + }, + .num_slots = 1, + .flags = 0, +}; + +static struct platform_device conxs_device = { + .name = "conxs", + .id = -1, + .num_resources = ARRAY_SIZE(tri5_conxs_resources), + .resource = tri5_conxs_resources, + .dev = { + .platform_data = &tri5_conxs_platdata, + } +}; + +static struct platform_device *trizeps5_devices[] __initdata = { + &flash_device, + &dm9000_device, + &leds_devices, + &conxs_device, +}; + +/* a I2C based RTC is known on CONXS board */ +static struct i2c_board_info trizeps5_i2c_devices[] __initdata = { + { I2C_BOARD_INFO("rtc-pcf8593", 0x51) } +}; + +/**************************************************************************** + * MMC card slot external to module + ****************************************************************************/ +static int trizeps5_mci1_init(struct device *dev, irq_handler_t mci_detect_int, + void *data) +{ + int err; + + err = request_irq(TRIZEPS5_MMC1_IRQ, mci_detect_int, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_SAMPLE_RANDOM, + "MMC1 card detect", data); + if (err) { + printk(KERN_ERR "trizeps5_mci1_init: MMC/SD: can't request" + "MMC1 card detect IRQ\n"); + return -1; + } + return 0; +} + +static void trizeps5_mci1_exit(struct device *dev, void *data) +{ + free_irq(TRIZEPS5_MMC1_IRQ, data); +} + +static struct pxamci_platform_data trizeps5_mci1_platform_data = { + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .detect_delay = 10, + .init = trizeps5_mci1_init, + .exit = trizeps5_mci1_exit, + .get_ro = NULL, /* write-protection not supported */ + .setpower = NULL, /* power-switching not supported */ +}; + +static int trizeps5_mci2_init(struct device *dev, irq_handler_t mci_detect_int, + void *data) +{ + int err; + + err = request_irq(TRIZEPS5_MMC2_IRQ, mci_detect_int, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_SAMPLE_RANDOM, + "MMC2 card detect", data); + if (err) { + printk(KERN_ERR "trizeps5_mci2_init: MMC/SD: can't request" + "MMC2 card detect IRQ\n"); + return -1; + } + return 0; +} + +static void trizeps5_mci2_exit(struct device *dev, void *data) +{ + free_irq(TRIZEPS5_MMC2_IRQ, data); +} + +static struct pxamci_platform_data trizeps5_mci2_platform_data = { + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .detect_delay = 10, + .init = trizeps5_mci2_init, + .exit = trizeps5_mci2_exit, + .get_ro = NULL, /* write-protection not supported */ + .setpower = NULL, /* power-switching not supported */ +}; + +/**************************************************************************** + * IRDA mode switching on stuart + ****************************************************************************/ +#ifndef STATUS_LEDS_ON_STUART_PINS +static short trizeps_conxs_ircr; + +static int trizeps5_irda_startup(struct device *dev) +{ + trizeps_conxs_ircr &= ~ConXS_IRCR_SD; + IRCR_writew(trizeps_conxs_ircr); + return 0; +} + +static void trizeps5_irda_shutdown(struct device *dev) +{ + trizeps_conxs_ircr |= ConXS_IRCR_SD; + IRCR_writew(trizeps_conxs_ircr); +} + +static void trizeps5_irda_transceiver_mode(struct device *dev, int mode) +{ + unsigned long flags; + + local_irq_save(flags); + /* Switch mode */ + if (mode & IR_SIRMODE) + trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */ + else if (mode & IR_FIRMODE) { + trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */ + + /* Switch power */ + if (mode & IR_OFF) + trizeps_conxs_ircr |= ConXS_IRCR_SD; + else + trizeps_conxs_ircr &= ~ConXS_IRCR_SD; + + IRCR_writew(trizeps_conxs_ircr); + local_irq_restore(flags); +} + +static struct pxaficp_platform_data trizeps5_ficp_platform_data = { + .transceiver_cap = IR_SIRMODE | IR_OFF, + .transceiver_mode = trizeps5_irda_transceiver_mode, + .startup = trizeps5_irda_startup, + .shutdown = trizeps5_irda_shutdown, +}; +#endif + +/**************************************************************************** + * OHCI USB port + ****************************************************************************/ +static struct pxaohci_platform_data trizeps5_ohci_platform_data = { + .port_mode = PMM_PERPORT_MODE, + .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, +}; + +static struct pxafb_mode_info sharp_lcd_mode = { + .pixclock = 78000, + .xres = 640, + .yres = 480, + .bpp = 8, + .hsync_len = 4, + .left_margin = 4, + .right_margin = 4, + .vsync_len = 2, + .upper_margin = 0, + .lower_margin = 0, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info sharp_lcd = { + .modes = &sharp_lcd_mode, + .num_modes = 1, + .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL, + .cmap_inverse = 0, + .cmap_static = 0, + .pxafb_backlight_power = board_backlight_power, +}; + +static struct pxafb_mode_info toshiba_lcd_mode = { + .pixclock = 39720, + .xres = 640, + .yres = 480, + .bpp = 8, + .hsync_len = 63, + .left_margin = 12, + .right_margin = 12, + .vsync_len = 4, + .upper_margin = 32, + .lower_margin = 10, + .sync = 0, + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info toshiba_lcd = { + .modes = &toshiba_lcd_mode, + .num_modes = 1, + .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL), + .cmap_inverse = 0, + .cmap_static = 0, + .pxafb_backlight_power = board_backlight_power, +}; + +static void __init trizeps5_init(void) +{ + pxa3xx_mfp_config(ARRAY_AND_SIZE(trizeps5_pin_config)); + platform_add_devices(trizeps5_devices, + ARRAY_SIZE(trizeps5_devices)); + + if (0) /* dont know how to determine LCD */ + set_pxa_fb_info(&sharp_lcd); + else + set_pxa_fb_info(&toshiba_lcd); + + pxa_set_mci_info(&trizeps5_mci1_platform_data); + pxa3xx_set_mci2_info(&trizeps5_mci2_platform_data); +#ifndef STATUS_LEDS_ON_STUART_PINS + pxa_set_ficp_info(&trizeps5_ficp_platform_data); +#endif + pxa_set_ohci_info(&trizeps5_ohci_platform_data); + pxa_set_ac97_info(NULL); + pxa_set_i2c_info(NULL); + i2c_register_board_info(0, trizeps5_i2c_devices, + ARRAY_SIZE(trizeps5_i2c_devices)); + +#ifdef CONFIG_IDE_PXA_CF + /* if boot direct from compact flash dont disable power */ + board_pcmcia_power(1); +#else + /* this is the reset value */ + board_pcmcia_power(0); +#endif + board_backlight_power(1); +} + +static void __init trizeps5_map_io(void) +{ + pxa_map_io(); +} + +MACHINE_START(TRIZEPS5, "Keith und Koep Trizeps V module") + /* MAINTAINER("Jürgen Schindele") */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = TRIZEPS5_SDRAM_BASE + 0x100, + .init_machine = trizeps5_init, + .map_io = trizeps5_map_io, + .init_irq = pxa3xx_init_irq, + .timer = &pxa_timer, +MACHINE_END diff -Nrup linux-2.6.28/arch/arm/mach-pxa/trizeps_conxs.c linux-2.6.28-patch/arch/arm/mach-pxa/trizeps_conxs.c --- linux-2.6.28/arch/arm/mach-pxa/trizeps_conxs.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.28-patch/arch/arm/mach-pxa/trizeps_conxs.c 2009-01-05 13:53:59.000000000 +0100 @@ -0,0 +1,227 @@ +/* + * linux/arch/arm/mach-pxa/trizeps_conxs.c + * + * Support for the Keith und Koep Base board ConXS. + * + * Author: Jürgen Schindele + * Created: 20 10, 2008 + * Copyright: Jürgen Schindele + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +#define DEBUG + */ + +#include +#include +#include + +#include +#include + +#include +#include